tm virtual components for the converging world optimized for amphion continues to expand its family of application-specific cores 1 see http://www.amphion.com for a current list of products cs5010-40 des/3des encryption/decryption cores the cs5010-cs5040 des/3des encryption/decryption cores are designed to achieve data privacy in digital broadband, wireless, and multimedia systems. these high performance application specific silicon cores support the data encryption standard (also referred as data encryption algorithm) as described in the nist federal information processing standard 46-3. they offer an efficient means of providing both des and triple des encryption and decryption in one core in order to rapidly construct complete security solutions. the des/3des family of cores are available in both asic and programmable logic versions that have been hand crafted by amphion to deliver high performance while minimizing power consumption and silicon area. figure 1: example of a secure audio/video based remote patient monitoring system using des/3des patient room camera mpeg-2 encoder security gateway high speed des/3des encoder nurse station pc mpeg-2 decoder security gateway high speed des/3des decoder 10/100-base t-hub encryption core features table 1: cs5010-40 features at a glance cs5010 ultra compact cs5020 compact cs5030 high speed cs5040 ultra high speed fully compliant with des nist fips 46-3 ? ? ? ? des and triple des support ? ? ? ? 32-bit i/o ? ? ? 128-bit i/o ? 28-bit key input port ? ? ? 56-bit key input port ? ede2 and ede3 triple des (112- or 168-bit key length) ? ? ? ?
2 optimized for cs5010-40 des/3des encryption/decryption cores applications ? electronic financial transactions - ecommerce -banking - securities exchange - point-of-sale ? secure corporate communications - storage area networks (san) - virtual private networks (vpn) - video conferencing - voice services ? personal mobile communications - video phones -pda - point-to-point wireless - wearable computers ? secure environments - satellite communications - surveillance systems - network appliances data encryption algorithm the data encryption algorithm is an iterated block cipher with a feistel structure that encrypts and decrypts data in 64- bit data blocks using a 56-bit key. the algorithm consists of: ? an initial permutation of the input data ? sixteen rounds of the same process - the des round ? a final inverse initial permutation of the data figure 2 represents a block diagram of the data encryption algorithm. a des round transforms the data using permutations, additions and non-linear substitutions. the des key schedule consists of three parts: 1. key permutation - to remove the eight redundant parity bits within the 64-bit key, and to permute the key 2. scheduled circular shifting - the permuted key is circu- larly shifted according to a schedule by either 1 or 2 bits, to the left or right. 3. key compression - the 56-bit shift key is compressed using another permutation, or rearrangement, to obtain a 48-bit subkey. the triple data encryption algorithm offers increased security by extending the des key to 112 or 168 bits, thus greatly reducing the effectiveness of exhaustive key searches or "brute-force" attacks. triple des is simply three successive des operations in the sequence of encrypt-decrypt-encrypt, or decrypt-encrypt-decrypt if decrypting data. figure 2: des algorithm structure
optimized for 3 tm functional description the amphion series of des/3des cores offer a complete solution to maintaining legacy des functionality for modern data encryption needs, offering a simple interface, no internal or external memory usage, no external keyspace processing, and a highly efficient design offering unparalleled performance. the cs5010 ultra compact des/3des and the cs5020 compact des/3des cores are designed to offer an efficient yet high performance means of both des and triple des encryption/decryption, with the emphasis on reduced resource usage. the cs5030 high speed des/3des core offers an increased data throughput in comparison to the compact cores, while still achieving a highly efficient hardware implementation. the cs5040 ultra high speed des/3des core is designed to provide a high performance solution while still achieving a relatively low resource usage. the ultra compact des/3des core is capable of all des standard modes of operation. the use of these added modes of operation on compact, high speed and ultra high speed des/3des cores is subject to conditions. for example, it is impractical to use a fully pipelined des core to perform cbc mode, as the data throughput of the hardware would have to be substantially reduced in order to support the feedback xor operation between output and input of the des core. all versions of the amphion des/3des cores follow the block diagram shown in figure 3. the des/3des cores are excellent complements to other amphion cores. for instance they can be combined with the cs6650 mpeg-2 decoder to rapidly construct a secure patient monitoring system, and they can be combined with the cs4191 adpcm codec to achieve secure, high speed, high channel-count speech processing in voice-over-packet (vop) systems. the amphion encryption/decryption cores are also an excellent choice for vpn security ics incorporated into broadband switches, routers, firewalls and remote access concentrators. likewise, the cores are an ideal fit for the secure socket layer (ssl) channel ics used in web servers, wap gateways and other access applications requiring a high number of parallel ssl channels to carry out ecommerce. figure 3: block diagram of des/3des cores ciphertext/ plaintext control logic input buffer key scheduler key buffer key plaintext/ ciphertext des round transformations output buffer
4 optimized for cs5010-40 des/3des encryption/decryption cores cs5210-40 symbol and pin description table 2 describes the input and output ports (shown graphically in figure 4) of the cs5010-40 series of des/3des encryption cores. unless otherwise stated, all signals are active high and bit(0) is the least significant bit. figure 4: cs5010-40 des/3des symbol des/3des triple ede kload dload kaddr key mode daddr d dstat qstrb qaddr q clk rst
optimized for 5 tm table 2: cs5010-40 des/3des cores interface signal definitions signal i/o width (bits) description d i 32 (64 ultra high speed) input plaintext/ciphertext data daddr i 1 (ultra compact) 2 (compact) 3 (high speed) 0 (ultra high speed) input plaintext/ciphertext data address, 0: the lowest 32-bit word dload i 1 load input plaintext/ciphertext enable key i 28 (56 ultra high speed) encryption key data kaddr i 2 encryption key address, 0: the lowest 28-bit word kload i 1 load encryption key mode i 1 encryption/decryption mode select, 0: encryption. 1: decryption triple i 1 des/3des mode select, 0: des, 1:3des ede i 1 triple des key selection mode, 0:ede2, 1: ede3 clk i 1 system clock, rising edge active rst i 1 asynchronous reset dstat o 1 input port status this signal will be asserted when the core is ready for loading the highest word of the next 64-bit data block, or the highest word of the multiple input des blocks available in the compact or high speed cores. the lower words can be loaded at anytime in the period when dstat is low depending on the key-size selection qstrb o 1 output strobe indicating the plaintext/ciphertext word q is valid qaddr o 1 (ultra compact) 2 (compact) 3 (high speed) 0 (ultra high speed) output plaintext/ciphertext data address, 0: the lowest 32-bit word q o 32 (64 ultra high speed) output plaintext/ciphertext data
6 optimized for cs5010-40 des/3des encryption/decryption cores availability and implementation information hardware accelerated 3des technology is governed internationally by export regulations. amphion 3des cores listed in this datasheet are available within the uk. license to export to the following countries is pending: austria denmark hungary new zealand spain australia finland ireland the netherlands sweden belgium france italy norway switzerland canada germany japan poland united kingdom czech republic greece luxembourg portugal united states for delivery to other destinations, please contact amphion. approval is subject to applicable export regulations. licensees of the amphion 3des cores are responsible for complying with applicable requirements for the re-export of electronics containing 3des technology.
optimized for 7 tm programmable logic cores for asic prototyping or for projects requiring the fast time-to-market of a programmable logic solution, amphion programmable logic core offer the silicon-aware performance tuning found in all amphion products, combined with the rapid design times offered by today?s leading programmable logic solutions. cycles per operation for the cs5010-40 cores are 16, 8, 4 and 1 respectively note : speed grade = -3 cycles per operation for the cs5010-40 cores are 16, 8, 4 and 1 respectively table 3: cs5010-40 des/3des programmable logic cores using actel axcelerator product id silicon vendor device max. frequency (mhz) data rate (mbits/sec) utilization device util availability des 3des r-cells c-cells CS5010RR actel ax500 71 284 94 545 1151 22% now cs5020rr actel ax500 63 504 168 735 1715 31% now cs5030rr actel ax500 57 912 304 1213 3116 54% now cs5040rr actel ax1000 56 3584 1194 4162 7179 63% now table 4: cs5010-40 des/3des programmable logic cores using actel proasicplus product id silicon vendor device max. frequency (mhz) data rate (mbits/sec) utilization (tiles) device util availability des 3des combinatorial sequential cs5010rq actel apa150 27 108 36 1923 510 40% now cs5020rq actel apa150 27 216 72 2830 712 58% now cs5030rq actel apa300 21 336 112 5253 1192 79% now cs5040rq actel apa600 26 1664 554 11331 3926 71% now
cs5010-40 des/3des encryption/decryption cores tm virtual components for the converging world corporate headquarters amphion semiconductor ltd 50 malone road belfast bt9 5bs northern ireland, uk tel: +44.28.9050.4000 fax: +44.28.9050.4001 european sales amphion semiconductor ltd cbxii, west wing 382-390 midsummer boulevard central milton keynes mk9 2rg england, uk tel: +44 1908 847109 fax: +44 1908 847580 worldwide sales & marketing amphion semiconductor, inc 2001 gateway place, suite 130w san jose, ca 95110 tel: (408) 441 1248 fax: (408) 441 1239 canada & east coast us sales amphion semiconductor, inc montreal quebec canada tel: (450) 455 5544 fax : (450) 455 5543 web: www.amphion.com email: info@amphion.com about amphion amphion (formerly integrated silicon systems) is the leading supplier of speech coding, video/ image processing and channel coding application specific silicon cores for system-on-a-chip (soc) solutions in the broadband, wireless, and mulitmedia markets ? 2002 amphion semiconductor ltd. all rights reserved. amphion, the amphion logo and ?virtual components for the converging world? are trademarks of amphion semiconductor ltd. all others are he property of their respective owners. optimized for 8 10/02 publica ion #: ds5010/40act v1.2 sales agents sps-da pte ltd 21 science park rd #03-19 the aquarius singapore science park ii singapore 117628 t el: +65 774 9070 fax: +65 774 9071 spinnaker systems inc shin-yokohama square bldg. 11f, 2-3-12 shin-yokohama, kouhoku-ku yokohama 222-0033 japan tel: +81 45 478 3803 fax: +81 45 478 3809 v oy ageur t echnical sales inc 6205 airport road building a, suite 300 toronto, ontario canada l4v1e1 t el: (905) 672 0361 fax: (905) 677 4986 jasontech, inc hansang building, suite 300 bangyidong 181-3, songpaku seoul korea 138-050 t el: +82 2 420 6700 fax: +82 2 420 8600 phoenix t echnologies ltd 3 gavish street kfar -saba, 44424 israel t el: +972 9 7644 800 fax: +972 9 7644 801
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