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Cypress
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| Part No. |
CY7C1360V25 CY7C1362V25 CY7C1364V25 7C1360V
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| OCR Text |
.../O pins. When LOW, the I/O pins behave as outputs. When deasserted HIGH, I/O pins are three-stated, and act as input data pins. OE is masked during the first clock of a read cycle when emerging from a deselected state. Advance Input signal,... |
| Description |
256K x 36/256K x 32/512K x 18 Pipelined SRAM
From old datasheet system
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| File Size |
412.55K /
31 Page |
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it Online |
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Atmel Corp.
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| Part No. |
AT49SV12804 AT49SV12804-70TI AT49SN12804
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| OCR Text |
...chronous reads, the device will behave like a standard asynchronous flash memory. in the page mode, the avd signal can be tied to gnd or can be pulsed low to latch the page address. in both cases the clk can be tied to gnd. the at49sn/sv1... |
| Description |
128-megabit (8M x 16) Burst/Page Mode 1.8-volt Flash Memory
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| File Size |
388.47K /
41 Page |
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it Online |
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Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
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| Part No. |
CY7C1352-133AC CY7C1352-80AC
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| OCR Text |
...w, the i/o pins are allowed to behave as outputs. when deasserted high, i/o pins are three-stated, and act as input data pins. oe is masked during the data portion of a write sequence, during the first clock when emerging from a deselec... |
| Description |
256K x18 Pipelined SRAM with NoBL Architecture 256K X 18 ZBT SRAM, 7 ns, PQFP100
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| File Size |
187.29K /
12 Page |
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it Online |
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Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
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| Part No. |
CY7C1350B-133AI CY7C1350B-133AC CY7C1350B-166AC
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| OCR Text |
...w, the i/o pins are allowed to behave as outputs. when deasserted high, i/o pins are three-stated, and act as input data pins. oe is masked during the data portion of a write sequence, during the first clock when emerging from a deselec... |
| Description |
128Kx36 Pipelined SRAM with NoBL Architecture 128K X 36 ZBT SRAM, 3.5 ns, PQFP100
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| File Size |
201.27K /
14 Page |
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it Online |
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Cypress Semiconductor Corp.
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| Part No. |
CY7C1380BV25-150BGC CY7C1382BV25-133BGC CY7C1382BV25-133AC CY7C1380BV25-133AC CY7C1380BV25-133BGC CY7C1382BV25-150BGC CY7C1382BV25-150AC CY7C1382BV25-200AC CY7C1382BV25-200BGC CY7C1382BV25-166BGC CY7C1380BV25-166AC CY7C1380BV25-166BGC CY7C1380BV25-200BGC CY7C1380BV25-200AC CY7C1382BV25-166AC
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| OCR Text |
.../o pins. when low, the i/o pins behave as outputs. when deasserted high, i/o pins are three-stated, and act as input data pins. oe is masked during the first clock of a read cycle when emerging from a deselected state. adv input- synchr... |
| Description |
512K x 36 / 1 Mb x 18 Pipelined SRAM
FUSE, FAST ACTING, 250MA; Current, fuse rating:250mA; Case style:Radial; Voltage rating, AC:250V; Approval Bodies:CSA, IEC60127-3, SEMKO, UL, VDE; Current, breaking capacity AC:35A; Diameter, body:8.4mm; Diameter, lead:0.6mm; Fuse RoHS Compliant: Yes
FUSE, FAST ACTING, 5A; Current, fuse rating:5A; Case style:Radial; Voltage rating, AC:250V; Approval Bodies:CSA, IEC60127-3, UL; Current, breaking capacity AC:50A; Diameter, body:8.4mm; Diameter, lead:0.6mm; Fuse type, blowing RoHS Compliant: Yes
FUSE, TIME DELAY, 100MA; Current, fuse rating:100mA; Case style:Radial; Voltage rating, AC:250V; Approval Bodies:CSA, IEC60127-3, SEMKO, UL, VDE; Current, breaking capacity AC:35A; Diameter, body:8.4mm; Diameter, lead:0.6mm; Fuse RoHS Compliant: Yes
FUSE, FAST ACTING, 500MA; Current, fuse rating:500mA; Case style:Radial; Voltage rating, AC:250V; Approval Bodies:CSA, IEC60127-3, SEMKO, UL, VDE; Current, breaking capacity AC:35A; Diameter, body:8.4mm; Diameter, lead:0.6mm; Fuse RoHS Compliant: Yes
FUSE, FAST ACTING, 2A; Current, fuse rating:2A; Case style:Radial; Voltage rating, AC:250V; Approval Bodies:CSA, IEC60127-3, SEMKO, UL, VDE; Current, breaking capacity AC:35A; Diameter, body:8.4mm; Diameter, lead:0.6mm; Fuse type, RoHS Compliant: Yes
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| File Size |
656.16K /
30 Page |
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it Online |
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Cypress
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| Part No. |
CY7C1340G-100AXC
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| OCR Text |
...dq pins. when low, the dq pins behave as outputs. when deasse rted high, dq pins are tri-stated, and act as input data pins. oe is masked during the first clock of a r ead cycle when emerging from a deselected state. adv input- synchr... |
| Description |
4-Mbit (128K x 32) Pipelined DCD Sync SRAM
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| File Size |
262.10K /
16 Page |
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it Online |
Download Datasheet |
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Price and Availability
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