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Motorola
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| Part No. |
MC100ES6226
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| OCR Text |
...utput enable eliminating output runt pulse generation and metastability * Standard 32 lead LQFP package
* Industrial temperature range
Functional Description MC100ES6226 is designed for very skew critical differential clock distribution... |
| Description |
2.5/3.3V Dlfferentlal LVPECL 1:9 Clock Distribution Buffer and Clock Dlvlder
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| File Size |
126.51K /
12 Page |
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Motorola
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| Part No. |
MC100ES6254
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| OCR Text |
...utput enable eliminating output runt pulse generation and metastability * Standard 32 lead LQFP package
* Industrial temperature range Functional Description MC100ES6254 is designed for very skew critical differential clock distribution ... |
| Description |
2.5/3.3V Dlfferentlal LVPECL 2x2 Clock Clock Swltch and Fanout Buffer
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| File Size |
128.77K /
12 Page |
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it Online |
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Motorola
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| Part No. |
MC100ES8111
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| OCR Text |
...ed internally preventing output runt pulse generation. Outputs are only disabled or enabled when the outputs are already in logic low state (true outputs logic low, inverted outputs logic high). The internal synchronizer eliminates the setu... |
| Description |
Preliminary Information LOW Voltage 1:10 Dlfferentlal HSTL Clock Fanout Buffer
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| File Size |
129.93K /
8 Page |
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Motorola
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| Part No. |
MC100ES8223
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| OCR Text |
...re is a chance of generating a `runt' clock pulse when the device is enabled/disabled. The MC100ES8223 is pin and function compatible to the MC100EP223.
1. AC specifications are design targets and subject to change
This document contain... |
| Description |
Preliminary Information LOW Voltage 1:22 Dlfferentlal HSTL Clock Fanout Buffer
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| File Size |
170.46K /
8 Page |
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pmc
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| Part No. |
2000421
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| OCR Text |
................................ 3 runt CELLS CAN CAUSE CELL ERRORS WHEN IN MULTIPORT MODE................................................................................. 4 ADAPTIVE CLOCK RECOVERY MODE - UNDERRUN STATUS COULD BE MISSED ......... |
| Description |
From old datasheet system
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| File Size |
589.57K /
34 Page |
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it Online |
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ICST[Integrated Circuit Systems]
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| Part No. |
ICS8521I-03 ICS8521AYI-03 ICS8521AYI-03T
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| OCR Text |
...nally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin.
,&6
Guaranteed output skew and part-to-part skew characteristics make the ICS8521I-03 ideal for today's most a... |
| Description |
LOW SKEW, 1-TO-9 DIFFERENTIAL-TO-LVHSTL FANOUT BUFFER
Low Skew, 1-to-9, Differential-to- LVHSTL Fanout Buffer. VOHmax=1V. Industrial Temperature.
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| File Size |
118.39K /
15 Page |
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ICS
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| Part No. |
ICS8521I
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| OCR Text |
...nally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/ deassertion of the clock enable pin.
,&6
Guaranteed output skew, part-to-part skew and crossover voltage characteristics make the ICS8521I ideal f... |
| Description |
Low Skew, 1-to-9, Differential-to- HSTL Fanout Buffer. Industrial Temp. VOHmax=1.4V. (P)
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| File Size |
115.29K /
14 Page |
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ICS
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| Part No. |
ICS8521
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| OCR Text |
...nally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin.
ICS
Guaranteed output skew, part-to-part skew and crossover voltage characteristics make the ICS8521 ideal f... |
| Description |
Low Skew, 1-to-9, Differential-to- HSTL Fanout Buffer. VOHmax=1.4V
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| File Size |
267.52K /
15 Page |
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it Online |
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Motorola
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| Part No. |
MC12429
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| OCR Text |
...ous to eliminate possibility of runt pulse generation on the FOUT output. Function
TIMING SOLUTIONS
3
MOTOROLA
MC12429
+3.3 or 5.0V
1MHz FREF DIV 16
PLL_VCC PHASE DETECTOR VCO VCC0 DIV N (1, 2, 4, 8) 25 24 23 FOUT FOUT
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| Description |
Hlgh Frequency Clock Syntheslzer
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| File Size |
163.80K /
12 Page |
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it Online |
Download Datasheet |
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Price and Availability
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