|
|
|
Samsung Electronic SAMSUNG[Samsung semiconductor]
|
Part No. |
S5T8555X01-L0B0 S5T8555
|
OCR Text |
...Frame Sync BCLK Delay Time from blck Low to FSX/R0-3 High or Low Hold Time from Channel Select to CLK Set-Up Time from Channel Select to CLK Period of Clock Width of Clock High Width of Clock Low Set-Up Time from DC to CLK Hold Time from CL... |
Description |
TIME SLOT ASSIGNMENT CIRCUIT
|
File Size |
84.36K /
10 Page |
View
it Online |
Download Datasheet |
|
|
|
SAMES[Sames]
|
Part No. |
SA8702
|
OCR Text |
...ystem. Each timeslot pulse is 8 blck cycles long. BCLK is the 2,048 station clock provided by the system. An active MRST will disable all outputs until a valid XSYNC input is recognised. The output TSX is delayed by half a cycle and indicat... |
Description |
BLOCK MODE TIME SLOT ALLOCATION CIRCUIT
|
File Size |
27.07K /
6 Page |
View
it Online |
Download Datasheet |
|
|
|
SAMSUNG SEMICONDUCTOR CO. LTD.
|
Part No. |
S5T8557B01-D0B0
|
OCR Text |
...e train 6 d r pcm data input. 7 blck r / clksel logic input which selects either 1.536mhz/1.544mhz or 2.048mhz for master clock in normal operation and bclk x is used for both tx and rx directions. alternately direct clock input available... |
Description |
1 CHIP CODEC
|
File Size |
84.93K /
14 Page |
View
it Online |
Download Datasheet |
For
blck Found Datasheets File :: 16 Search Time::1.063ms Page :: | <1> | 2 | |
▲Up To
Search▲ |
|
Price and Availability
|