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IDT
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Part No. |
IDTcspt857_A
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OCR Text |
...nd 56-pin VFBGA packages
The cspt857 is a PLL based clock driver that acts as a zero delay buffer to distribute one differential clock input pair(CLK, CLK ) to 10 differential output pairs (Y [0:9], Y [0:9]) and one differential pair of ... |
Description |
2.5V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER
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File Size |
121.50K /
12 Page |
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Download Datasheet |
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cspt857 Found Datasheets File :: 2 Search Time::0.781ms Page :: | <1> | |
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