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IDT
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| Part No. |
IDT79R3052E IDT79R3052 IDT79R3051E IDT79R3051
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| OCR Text |
...IDT79R3051 family. The cache is implemented as a direct mapped cache, and is capable of caching instructions from anywhere within the 4GB physical address space. The cache is implemented using physical addresses (rather than virtual address... |
| Description |
RISControllers?
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| File Size |
333.66K /
26 Page |
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it Online |
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Zarlink
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| Part No. |
MT90220
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| OCR Text |
...roups over 8 T1/E1 links can be implemented Supports MIXED mode; links not assigned to an IMA group can be used in UNI mode Versatile PCM Interface to most popular T1 or E1 framers, reducing development time Supports Symmetrical and Asymmet... |
| Description |
Octal IMA/UNI PHY Device
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| File Size |
969.43K /
116 Page |
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it Online |
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quicklogic
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| Part No. |
QL5130
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| OCR Text |
...interface and glue-logic can be implemented on chip * Six 64-deep FIFOs (two RAMs each) or three 128-deep FIFOs (four RAMs each) or a combination that requires twelve or less QuickLogic RAM modules * Two 32-bit busses interface between the ... |
| Description |
33 MHz/32-Bit PCI Target with Embedded
Programmable Logic and Dual Port SRAM
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| File Size |
704.61K /
24 Page |
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it Online |
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INFINEON[Infineon Technologies AG]
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| Part No. |
SAK82C900 82C900
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| OCR Text |
...s: * Two interface channels are implemented for the communication with a host device: - the Multiplexed Data/Address Bus can be used by an external CPU to read and write the TwinCAN's internal registers for initial configuration and control... |
| Description |
Standalone TwinCAN Controller
IC,LAN NODE CONTROLLER,CMOS,SOP,28PIN
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| File Size |
381.00K /
29 Page |
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it Online |
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Philips
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| Part No. |
PDI1394P25
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| OCR Text |
...nnex J of IEEE Std 1394-1995 is implemented between the PDI1394P25 and LLC, the ISO terminal should be tied low to enable the differentiation logic. If no isolation barrier is implemented (direct connection), or bus holder isolation is impl... |
| Description |
1-port 400 Mbps physical layer interface
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| File Size |
216.56K /
44 Page |
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it Online |
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Philips
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| Part No. |
PDI1394P23
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| OCR Text |
...nnex J of IEEE Std 1394-1995 is implemented between the PDI1394P23 and LLC, the ISO terminal should be tied low to enable the differentiation logic. If no isolation barrier is implemented (direct connection), or bus holder isolation is impl... |
| Description |
2-port/1-port 400 Mbps physical layer interface
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| File Size |
216.99K /
42 Page |
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it Online |
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