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  UPD424280AG5-80 Datasheet PDF File

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Part No. UPD424280LLE-A80 UPD424280LLE-A70 UPD424280AG5M-80 UPD424280LG5M-A70 UPD424280LG5M-A60 UPD424280LV-A80 UPD424280LV-A60 UPD424280LV-A70 UPD42S4280ALE-80 UPD424280AV-80 UPD42S4280AV-80 UPD424280AG5-80 UPD42S4280LG5M-A70
Description x18 Fast Page Mode DRAM
Quad PLL Clock Generator with Serial Interface (I2C)
Low-Cost 3.3V Spread Aware™ Zero Delay Buffer
MediaClock™ MPEG Clock Generator with VCXO
MediaClock™ PDP Clock Generator
Field and Factory-Programmable Spread Spectrum Clock Generator for EMI Reduction
HOTLink II™ SMPTE Receiver Training Clock
3.3V Zero Delay Buffer x18快速页面模式的DRAM
File Size 1,666.96K  /  32 Page

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