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VITESSE[Vitesse Semiconductor Corporation]
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| Part No. |
VSC7216UC-01 VSC7216-01
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| OCR Text |
... REFCLKP REFCLKN
Tx Clock
x20/x10 Clock Gen
CAP0 CAP1
REFCLK TBERRA TBERRB TBERRC TBERRD TMODE(2:0) RMODE(1:0) RESETN ENDEC BIST TRSTN TMS TDI TCK
JTAG Boundary Scan
TDO
G52352-0, Rev 3.2 05/05/01
(c) VITESSE SEMICONDU... |
| Description |
Multi-Gigabit Interconnect Chip
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| File Size |
544.97K /
38 Page |
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Peregrine Semiconductor
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| Part No. |
PE42420
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| OCR Text |
....04 2.000.05 2.000.05 0.400.05 (x20) 0.260.05 (x20) 0.50 0.10 2.00 ref (x16) 0.31 (x20) 0.60 (x20) 2.05 2.05 4.20 4.20 0.50 (x16) 1 5 6 10 11 15 16 20 figure 21. package drawing 20-lead 4x4 mm lga figure 22. top marking specifications ... |
| Description |
UltraCMOS SPDT RF Switch 100 ?6000 MHz
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| File Size |
358.24K /
11 Page |
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it Online |
Download Datasheet |
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INTEGRATED DEVICE TECHNOLOGY INC
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| Part No. |
IDT72T40118L6.7BB IDT72T40108L6.7BBI 72T4098L4BB
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| OCR Text |
...g -x40 in to x40 out -x40 in to x20 out -x40 in to x10 out -x20 in to x40 out -x10 in to x40 out ? auto power down minimizes standby power consumption ? master reset clears entire fifo ? partial reset clears data, but retains programmable s... |
| Description |
128K X 40 OTHER FIFO, 3.8 ns, PBGA208
64K X 40 OTHER FIFO, 3.8 ns, PBGA208
32K X 40 OTHER FIFO, 3.2 ns, PBGA208
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| File Size |
501.75K /
52 Page |
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it Online |
Download Datasheet |
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INTEGRATED DEVICE TECHNOLOGY INC
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| Part No. |
IDT72T40118L6-7BBG
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| OCR Text |
...g -x40 in to x40 out -x40 in to x20 out -x40 in to x10 out -x20 in to x40 out -x10 in to x40 out ? auto power down minimizes standby power consumption ? master reset clears entire fifo ? partial reset clears data, but retains programmable s... |
| Description |
128K X 40 OTHER FIFO, 3.8 ns, PBGA208
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| File Size |
501.75K /
52 Page |
View
it Online |
Download Datasheet |
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INTEGRATED DEVICE TECHNOLOGY INC
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| Part No. |
IDT72T20108L6-7BBI
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| OCR Text |
...set logic wen wclk d 0 -d n (x20, x10) sren mrs ren rclk oe q 0 -q n (x20, x10) offset register prs fwft sen rt 5996 drw01 bus configuration ow fsel0 fsel1 iw mark sclk rcs jtag control (boundary scan) tck tms tdo tdi trst rsdr wcs erc... |
| Description |
64K X 20 OTHER FIFO, 3.8 ns, PBGA208
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| File Size |
507.87K /
51 Page |
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it Online |
Download Datasheet |
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INTEGRATED DEVICE TECHNOLOGY INC
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| Part No. |
72T20128L6.7BB IDT72T20108L6.7BBI IDT72T20118L6.7BB
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| OCR Text |
...set logic wen wclk d 0 -d n (x20, x10) sren mrs ren rclk oe q 0 -q n (x20, x10) offset register prs fwft sen rt 5996 drw01 bus configuration ow fsel0 fsel1 iw mark sclk rcs jtag control (boundary scan) tck tms tdo tdi trst rsdr wcs erc... |
| Description |
256K X 20 OTHER FIFO, 3.8 ns, PBGA208
64K X 20 OTHER FIFO, 3.8 ns, PBGA208
128K X 20 OTHER FIFO, 3.8 ns, PBGA208
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| File Size |
508.60K /
51 Page |
View
it Online |
Download Datasheet |
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INTEGRATED DEVICE TECHNOLOGY INC
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| Part No. |
72T4098L6-7BBG 72T40108L6-7BBGI
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| OCR Text |
...g -x40 in to x40 out -x40 in to x20 out -x40 in to x10 out -x20 in to x40 out -x10 in to x40 out ? auto power down minimizes standby power consumption ? master reset clears entire fifo ? partial reset clears data, but retains programmable s... |
| Description |
32K X 40 OTHER FIFO, 3.8 ns, PBGA208
64K X 40 OTHER FIFO, 3.8 ns, PBGA208
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| File Size |
479.37K /
52 Page |
View
it Online |
Download Datasheet |
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