 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| JT6N46S TOSHIBA CMOS Integrated Circuit Silicon Monolithic JT6N46S Single-Chip System LSI for RFID Card The JT6N46S is a system LSI for radio frequency identification (RFID) wireless cards. The JT6N46S incorporates an analog circuit, a data processing circuit and data memory in a single chip. Features * * * * * High-noise-resistant PSK modulation: binary phase-shift keying (BPSK) for both reader-to-RFID and RFID-to-reader transmission. Start-stop synchronization and half-duplex transmission: with parity, 1 stop bit High-efficiency power generation circuit using electromagnetic induction: battery less operation, full-wave rectifier circuit, shunt regulator Data processing logic circuit: digital PLL, security circuit High-reliability E2PROM: 4 Kbits Maximum write time: 7 ms (16-byte batch write) Overwrite: 100,000 times Data retention: 10 years Selectable receive carrier frequency: 100 kHz to 500 kHz (when external antenna circuit is used) Programmable security circuit: security level can be set High-speed transfer rate of 25 kbps: 1/16 of receive carrier frequency = 400 kHz High-speed multi-read of 32 IDs per second: when receive carrier frequency = 400 kHz (ID only read) Supplied as chips or on wafer Chip thickness: 175 m (typ.) * * * * * 000707EDA1 * TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. * The products described in this document are subject to the foreign exchange and foreign trade laws. * The products described in this document contain components made in the United States and subject to export control of the U.S. authorities. Diversion contrary to the U.S. law is prohibited. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice. 2000-07-21 1/7 JT6N46S System Block Diagram 0.1 F (recommended value) VDD ANT1 Rectifier circuit ANT2 Shunt regulator BGR VDD Voltage detector Data processing, security and multi-read functions E PROM (1 Kbit) 2 GND Transmission circuit Carrier extraction circuit Transmission control Modulator Demodulator Digital PLL OSC 2000-07-21 2/7 JT6N46S Pad Allocation Y 1 2 3 4 5 1.92 mm 6 0 GND 7 VDD 8 ANT2 11 12 13 X ANT1 10 9 2.35 mm Pad Coordinates Pad No. 1 2 3 4 5 6 7 8 9 10 11 12 13 Pad Name Test pin Test pin Test pin Test pin Test pin Test pin Test pin Test pin ANAPSK0 ANT1 ANT2 VDD GND X-Coordinate (m) -1010 -1010 -1010 -1010 -1010 -1010 -1010 226 770 1020 1020 1020 1020 Y-Coordinate (m) 762 622 482 342 202 62 -78 -363 -802 -466 -326 -186 -46 Note: Values for X-and Y-coordinates are pad center values. 2000-07-21 3/7 JT6N46S Pin Functions Pin No. 10 11 12 13 1~9 Symbol ANT1 ANT2 VDD GND Function Rectifier diode input, antenna connection pin 1 Rectifier diode input (carrier extraction input side), antenna connection pin 2 Power supply for bridge circuit output, regulator voltage and internal circuits GND-internal circuit voltage reference LSI test pins LSI External Specifications Parameter Power supply Coupling type Power feed frequency Communications method Transfer speed Transfer method Memory size Write time Specifications Battery less-externally supplied by electromagnetic induction Electromagnetic induction 100 kHz~200 kHz Note: An antenna and a capacitor are connected externally. Receive: PSK, Transmission: PSK (Reply carrier frequency is half the receive carrier frequency) 7.8 kbps (when receive carrier frequency is 125 kHz) 1/16 of receive carrier frequency Half-duplex start-stop synchronization transmission (with parity, 1 stop bit) 1-Kbit E PROM (256 bits are used as security area.) 7 ms max (for batch write of 8 bytes) Key checking and access level control by hardware * * Incorporates two access keys (6-byte key and 2-byte status). Using access keys, read-only or write/read privilege can be set independently for each 32-byte area (programmable security). Block write in units of 8 bytes and block read in units of 16 bytes using an access key and physical address. Controls multi-read using Multi-Read command. 2 Control circuit * * Multi-read Operating temperature 10 reads/s (power feed frequency of 125 kHz when ID only is read) -20C~+85C 2000-07-21 4/7 JT6N46S Functions and Specifications of the Core Block The JT6N46S is comprised of the following: an RF analog block for power generation, carrier extraction and regulation, and a digital block for data modulation, demodulation and data processing an E2PROM for data storage. 1. Analog Block (1) Rectifier circuit Receives radio wave via the (external) antenna circuit and generates DC power for operating internal circuits with full-wave rectification. Shunt regulator Maintains the voltage generated by the rectifier circuit at a fixed voltage, 3.1 V (typ.). The digital circuits and E2PROM operate using the voltage supplied by the shunt regulator. The shunt regulator also protects internal circuits from the effects of strong electric fields. Carrier extraction circuit Shapes the PSK-processed received carrier in to a square wave which is then input to the logic circuits for demodulation. Oscillation circuit (OSC) Generates a clock for the digital PLL in the logic block. (Oscillation frequency range: 3 MHz~5 MHz) Transmission circuit (parallel transmitter circuit) Modulates the reply using a resistance load from the ANT1 side of the rectifier circuit. The reply carrier frequency is half the receive carrier frequency. At reply, the JT6N46S carries out modulation by halting all blocks except those needed for transmission and using all the power which would be dissipated by the halted blocks for reply. Voltage detector Supports three types of voltage detector circuit for initializing the system and enabling/disabling E2PROM writing. As a result, operation is always stable. (2) (3) (4) (5) (6) 2. Digital Block (1) (2) Demodulator Converts the PSK signal shaped by the carrier extraction circuit of the analog block into binary data. Digital PLL Compares the frequency of the oscillator circuit in the analog block with the signal shaped by the carrier extraction circuit and generates a clock with a fixed frequency for operation of the entire digital block. Using the clock the internal LSI operates in synchronize with the carrier. Data processing Processes data according to the commands received. Processes include parity check, E2PROM write and read, and reset of the entire LSI. Security logic Two keys can be set simultaneously using the security area allocated to the E2PROM. Using the keys, write/read, read or no access can be set in units of 32-byte blocks (obtained by dividing E2PROM memory area by four). (For example, with key A, read/write for a particular block can be set, while with key B, read/write for any blocks can be set.) Status reply Replies to a command from the R/W consist of the status followed by data. The status represents, the internal status of the LSI to the R/W. If the LSI status is normal, status data 00H is inserted at the beginning (without any parity, start or end bits) followed by the data. If the LSI status is abnormal, no data follows and only the status indicating the abnormality is sent. The bit corresponding to each abnormality condition which has occurred is set to 1 in the status field. Multi-read Multi-read is a function used for reading multiple RFIDs in the communications area using the same reader/writer (R/W). An RFID (LSI) generates a random number internally using the Multi-Read command transmitted by the R/W. The RFID replies using the response timing determined by the corresponding time slot. Thus, replies from the different RFIDs will not conflict, enabling data to be received properly by the R/W. Note: Depending on the reading environment, the ability to read all the data may fluctuate . In some cases, some data may be left unread (since it cannot be undetected). Toshiba recommend the use of an additional chip with a detection function other than the multi-read function. (3) (4) (5) (6) 2000-07-21 5/7 JT6N46S Electrical Characteristics 1. Ratings Parameter Input current (between ANT1 GND ANT2) Operating temperature range Storage temperature range Symbol IANT Topr Tstg Operating Rating DC40 -20~+85 -50~+150 Unit mA C C *: Unless otherwise specified, the specifications are within the above operating temperature range. 2. DC Characteristics Parameter Symbol Test Circuit Description Minimum operating voltage excluding memory write (Voltage check pin is VDD.) Minimum operating voltage including memory write (Voltage check pin is VDD.) Current dissipation for operations excluding memory write (VDD = 2.2 V) Current dissipation for all operations including memory write (VDD = 2.9 V) Min Typ. Max Unit Minimum operating voltage 1 VDD (min) 2.0 2.2 V Minimum operating voltage 2 VDD (eew) 2.7 2.9 V Operating current dissipation 1 IDDopr1 350 450 A Operating current dissipation 2 IDDopr2 400 500 A 3. Operation Characteristics Parameter Receive carrier frequency Reply carrier frequency Transfer rate Receive 1-bit frequency Reply 1-bit frequency E PROM write time E PROM overwrite E PROM data hold time 2 2 2 Symbol fcrr fpsk tpw Ted Pre Test Circuit Description Carrier frequency at which operation is possible Carrier frequency at reply Transfer speed Receiving carrier frequency per bit Reply carrier frequency per bit Ambient temperature: -20C~+85C Min 100 Typ. fcrr x 1/2 fcrr x 1/16 16 8 Max 200 Unit kHz kHz bps Cycles Cycles 10 5 7 ms No. of times Years 10 2000-07-21 6/7 JT6N46S Memory Map Page No. 00H 02H 04H 06H 08H 0AH 0CH 0EH 8-Byte Block ATR data Key 0010 Any data Any data Any data Any data Any data Any data Page No. 01H 03H 05H 07H 09H 0BH 0DH 0FH 8-Byte Block ATR data Key 0101 Any data Any data Any data Any data Any data Any data Note 1: ATR: Answer to Reset. The LSI sends back the ATR data after receiving a reset command or self reset. Note 2: Using the keys at 02H and 03H, access privileges can be set for the 32-byte blocks (enclosed by bold lines) from 04H to 1FH. Note 3: Read is performed in units of 16 bytes from even-numbered addresses, 00H, 02H***0EH. Note 4: Write to E PROM is performed in units of 8 bytes to addresses matching the page numbers above. 2 The advantage of using this LSI is that it can be supplied as a single LSI for RFID allowing the user to configure peripherals (e.g. antennae, and reader/writers) so as to develop the desired system. However, because the peripheral environment may be highly user-specific, incompatibilities between the LSI and the user-configured environment (communications failures) may occur. Please carry out sufficient research before using this LSI. 2000-07-21 7/7 |
Price & Availability of EA09008
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |